Senior IP Design Engineer- Remote EU -(If/s)

We are seeking a Senior IP Design Engineer. The Senior IP Design Engineer will design high-performance IP targeting FPGA and Adaptive SoC technologies, delivering synthesis-ready designs that meet timing and integration requirements. Send CV if you are interested to (marcillina.tietjen@dcvtechnologies.co.uk) if you are interested.

Contract Type: ContractWork Model: Remote

Key Responsibilities

• Design SystemVerilog RTL for FPGA / Adaptive SoC

• Deliver synthesis-ready IP designs

• Ensure timing closure and integration readiness

• Support FPGA design flow from RTL to P&R

• Collaborate with verification and system teams

  
  

Required Skills

• SystemVerilog RTL design

• FPGA / Adaptive SoC design flow

• PCIe, Ethernet, AMBA / AXI

• Vivado / Vitis

• Python / TCL scripting

• Git, CI/CD