Integrated Circuit Designer

Place of work: Warsaw  

Selected Scope of Responsibilities: 

• Designing schematics, in-depth analysis, and simulation of analog, digital, and mixed-signal CMOS integrated circuits; 
• Performing layout design of CMOS integrated circuits; 
• Developing and programming the test and launch environment utilizing FPGA systems; 
• Concurrently creating gateware for Xilinx FPGA and Verilog code for ASIC to facilitate mutual communication; 
• Preparing progress reports. 

 Requirements: 

• Relevant higher education degree; 
• Excellent knowledge of Verilog and VHDL languages; 
• Proficiency with Vivado tools; 
• Experience working with MGT and DDR blocks; 
• Experience with version control systems; 
• Preferred experience in implementing HDL in ASIC using Cadence tools; 
• Preferred familiarity with FPGA tools such as Misoc/Migen/ARIQ; 
• Knowledge of Cadence environment; 
• Familiarity with LVS, DRC, ERC verification tools; 
• Knowledge of Genus Synthesis Solution, Innovus Implementation System, and Voltus IC Power Integrity Solution tools.